STM32 notes

there are 2 main peripheral documents:

1. PM0056 for core peripherals (MPU, NVIC, SCB, and STK)
2. RM0008 for all other peripherals

for non-core peripherals: usually APB1 or APB2 (see RM0008 figure 1 or figure 2)

for core peripherals: PPB (see PM0056 table 33)

the peripheral gets its clock from its bus (usually APB1 or APB2)

APB1 and APB2 divide the AHB clock to get their clocks

the AHB clock comes from the SYSCLK which is usually the internal RC oscillator or an external crystal oscillator. this is selected in an RRC register (see RM0008 7.3.1 & 7.3.2 or 8.3.1 & 8.3.2)

most peripheral clocks are disabled by default. they will need to be manually enabled via the RRC registers (see RM0008 7 or 8)

for non-core peripherals: see RM0008 3.3, table 3

for core peripherals: see PM0056 4.1, table 33

RM0008 will usually have a major section for each peripheral with a sub-section for its registers. here are some:

• RCC: RM0008 7.3 or 8.3
• GPIO: RM0008 9.2
• USART: RM0008 27.6

by default, I/O pins are mapped as GPIO. if different functionality is needed, the pins need to be placed in alternate function mode (see RM0008 9.2.1 and 9.2.2)

when a pin is in alternate function mode, its alternate function is determined by its alternate function mapping (see RM0008 9.4.2 and 9.4.7)

1. start SYSCLK
   1. start desired SYSCLK source
   2. wait for starting to complete
   3. switch to desired SYSCLK source
   4. disable old SYSCLK source
2. set up bus clocks
   1. set clock divider for AHB
   2. set clock divider for APB1 or APB2
      • APB1 cannot exceed 36Mhz!
3. enable bus clock for peripheral
4. (if necessary) set up pheripheral alternate function I/O pins
5. set up peripheral