Simple bare metal ARMv7 example
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commit 7d3fa285c9804890732f5d7188d9ce09522c1a32
Author: David DiPaola <>
Date:   Sat,  1 Dec 2018 12:25:19 -0500

initial commit

A.gitignore | 5+++++
ALICENSE | 117+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
AMakefile | 73+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ | 10++++++++++
Agdbinit | 2++ | 39+++++++++++++++++++++++++++++++++++++++
Amain.c | 40++++++++++++++++++++++++++++++++++++++++
7 files changed, 286 insertions(+), 0 deletions(-)

diff --git a/.gitignore b/.gitignore @@ -0,0 +1,5 @@ +*.o +boot.elf + +.*.swp + diff --git a/LICENSE b/LICENSE @@ -0,0 +1,117 @@ +CC0 1.0 Universal + +Statement of Purpose + +The laws of most jurisdictions throughout the world automatically confer +exclusive Copyright and Related Rights (defined below) upon the creator and +subsequent owner(s) (each and all, an "owner") of an original work of +authorship and/or a database (each, a "Work"). + +Certain owners wish to permanently relinquish those rights to a Work for the +purpose of contributing to a commons of creative, cultural and scientific +works ("Commons") that the public can reliably and without fear of later +claims of infringement build upon, modify, incorporate in other works, reuse +and redistribute as freely as possible in any form whatsoever and for any +purposes, including without limitation commercial purposes. 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Affirmer understands and acknowledges that Creative Commons is not a + party to this document and has no duty or obligation with respect to this + CC0 or use of the Work. + +For more information, please see +<> + diff --git a/Makefile b/Makefile @@ -0,0 +1,73 @@ +#2018 David DiPaola +#licensed under CC0 (public domain, see + +SRC = main.c +BIN_ELF = boot.elf +BIN_BIN = $(BIN_ELF:.elf=.bin) + +OBJ = $(SRC:.c=.o) + +PREFIX ?= arm-none-eabi- +GCC ?= $(PREFIX)gcc +GCC_FLAGS = \ + -std=c99 \ + -mcpu=cortex-a7 \ + -ffreestanding -nostdinc \ + -ffunction-sections -fdata-sections \ + -O2 \ + -g \ + $(CPP_FLAGS_DEBUG) +GLD ?= $(PREFIX)ld +GLD_FLAGS = \ + -static -nostdlib \ + -O1 --gc-sections --print-gc-sections +QEMU ?= qemu-system-arm +QEMU_FLAGS = \ + -gdb tcp::1234 \ + -nographic \ + -machine vexpress-a15 -cpu cortex-a7 \ + -m 32M +GDB ?= gdb-multiarch +GDB_FLAGS = \ + --command=gdbinit +OBJDUMP ?= $(PREFIX)objdump + +.PHONY: all +all: $(BIN_ELF) + +.PHONY: run +run: $(BIN_ELF) + @echo [QEMU] $< + @$(QEMU) $(QEMU_FLAGS) -kernel $< + +.PHONY: run-paused +run-paused: $(BIN_ELF) + @echo [QEMU] $< + @$(QEMU) $(QEMU_FLAGS) -S -kernel $< + +.PHONY: run-debugger +run-debugger: $(BIN_ELF) + @echo [GDB] $< + @$(GDB) $(GDB_FLAGS) $< + +.PHONY: dump-elf +dump-elf: $(BIN_ELF) + $(OBJDUMP) --disassemble --source --line-numbers $< + +.PHONY: dump-elf-syms +dump-elf-syms: $(BIN_ELF) + $(OBJDUMP) --syms $< + +.PHONY: clean +clean: + @echo [RM] $(OBJ) $(BIN_ELF) $(BIN_BIN) + @rm -rf $(OBJ) $(BIN_ELF) $(BIN_BIN) + +.c.o: + @echo [GCC] $< + @$(GCC) $(GCC_FLAGS) -o $@ -c $< + +$(BIN_ELF): $(OBJ) + @echo [GLD] -T -o $@ $(OBJ) + @$(GLD) $(GLD_FLAGS) -T -o $@ $(OBJ) + diff --git a/ b/ @@ -0,0 +1,10 @@ +# armv7_helloworld +Bare metal QEMU ARMv7 example + +## references + - `QEMU:vexpress.c` -- qemu-X.Y.Z/hw/arm/vexpress.c + - `DDI0183` -- ARM PL011 datasheet + +2018 David DiPaola +licensed under CC0 (public domain, see + diff --git a/gdbinit b/gdbinit @@ -0,0 +1,2 @@ +target extended-remote localhost:1234 + diff --git a/ b/ @@ -0,0 +1,39 @@ +/* +2018 David DiPaola +licensed under CC0 (public domain, see +*/ + +/* code entry point */ +ENTRY(main) + +/* memory regions (see QEMU:vexpress.c) */ +MEMORY { + MAP_IO_UART0 : ORIGIN = 0x1C090000, LENGTH = 0x00000400 /* 1KB */ + MAP_DRAM : ORIGIN = 0x80000000, LENGTH = 0x80000000 /* 2GB */ +} + +/* ELF binary sections */ +SECTIONS { + /* NOTE `SUBALIGN` is used with the `gcc` flags `-ffunction-sections` and `-fdata-sections` to ensure each function and piece of data are properly aligned */ + + /* IO: UART0 */ + SECTION_IO_UART0 ORIGIN(MAP_IO_UART0): SUBALIGN(4) { + *(.data) + *(.bss) + } >MAP_IO_UART0 + + /* DRAM */ + .text ORIGIN(MAP_DRAM) + 0 : SUBALIGN(4) { /* code and read-only data */ + *(.text.startup.main) + *(.text) + *(.rodata) + } >MAP_DRAM + .data ORIGIN(MAP_DRAM) + SIZEOF(.text) : SUBALIGN(4) { /* initialized data */ + *(.data) + } >MAP_DRAM + .bss ORIGIN(MAP_DRAM) + SIZEOF(.text) + SIZEOF(.data) : SUBALIGN(4) { /* uninitialized data */ + *(.bss) + } >MAP_DRAM + +} + diff --git a/main.c b/main.c @@ -0,0 +1,40 @@ +/* +2018 David DiPaola +licensed under CC0 (public domain, see +*/ + +#define pragma_section(name) __attribute__((section(name))) + +typedef unsigned int u32; + +/* PL011 registers (see DDI0183:3.2) */ +struct uart_pl011 { + volatile u32 dr; /* 0x000 */ +}; + +pragma_section("SECTION_IO_UART0") struct uart_pl011 uart0; + +static void +print(const char * s) { + char c; + for (;;) { + c = *s; + if (c == '\0') break; + uart0.dr = c; + s++; + } +} + +static void +println(const char * s) { + print(s); + print("\r\n"); +} + +void +main(void) { + for (;;) { + println("hi"); + } +} +