commit 7d3fa285c9804890732f5d7188d9ce09522c1a32
Author: David DiPaola <DavidDiPaola@users.noreply.github.com>
Date: Sat, 1 Dec 2018 12:25:19 -0500
initial commit
Diffstat:
| A | .gitignore | | | 5 | +++++ |
| A | LICENSE | | | 117 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | Makefile | | | 73 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | README.md | | | 10 | ++++++++++ |
| A | gdbinit | | | 2 | ++ |
| A | layout.lds | | | 39 | +++++++++++++++++++++++++++++++++++++++ |
| A | main.c | | | 40 | ++++++++++++++++++++++++++++++++++++++++ |
7 files changed, 286 insertions(+), 0 deletions(-)
diff --git a/.gitignore b/.gitignore
@@ -0,0 +1,5 @@
+*.o
+boot.elf
+
+.*.swp
+
diff --git a/LICENSE b/LICENSE
@@ -0,0 +1,117 @@
+CC0 1.0 Universal
+
+Statement of Purpose
+
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+applicable law, such partial invalidity or ineffectiveness shall not
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+affirms that he or she will not (i) exercise any of his or her remaining
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+and causes of action with respect to the Work, in either case contrary to
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+4. Limitations and Disclaimers.
+
+ a. No trademark or patent rights held by Affirmer are waived, abandoned,
+ surrendered, licensed or otherwise affected by this document.
+
+ b. Affirmer offers the Work as-is and makes no representations or warranties
+ of any kind concerning the Work, express, implied, statutory or otherwise,
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diff --git a/Makefile b/Makefile
@@ -0,0 +1,73 @@
+#2018 David DiPaola
+#licensed under CC0 (public domain, see https://creativecommons.org/publicdomain/zero/1.0/)
+
+SRC = main.c
+BIN_ELF = boot.elf
+BIN_BIN = $(BIN_ELF:.elf=.bin)
+
+OBJ = $(SRC:.c=.o)
+
+PREFIX ?= arm-none-eabi-
+GCC ?= $(PREFIX)gcc
+GCC_FLAGS = \
+ -std=c99 \
+ -mcpu=cortex-a7 \
+ -ffreestanding -nostdinc \
+ -ffunction-sections -fdata-sections \
+ -O2 \
+ -g \
+ $(CPP_FLAGS_DEBUG)
+GLD ?= $(PREFIX)ld
+GLD_FLAGS = \
+ -static -nostdlib \
+ -O1 --gc-sections --print-gc-sections
+QEMU ?= qemu-system-arm
+QEMU_FLAGS = \
+ -gdb tcp::1234 \
+ -nographic \
+ -machine vexpress-a15 -cpu cortex-a7 \
+ -m 32M
+GDB ?= gdb-multiarch
+GDB_FLAGS = \
+ --command=gdbinit
+OBJDUMP ?= $(PREFIX)objdump
+
+.PHONY: all
+all: $(BIN_ELF)
+
+.PHONY: run
+run: $(BIN_ELF)
+ @echo [QEMU] $<
+ @$(QEMU) $(QEMU_FLAGS) -kernel $<
+
+.PHONY: run-paused
+run-paused: $(BIN_ELF)
+ @echo [QEMU] $<
+ @$(QEMU) $(QEMU_FLAGS) -S -kernel $<
+
+.PHONY: run-debugger
+run-debugger: $(BIN_ELF)
+ @echo [GDB] $<
+ @$(GDB) $(GDB_FLAGS) $<
+
+.PHONY: dump-elf
+dump-elf: $(BIN_ELF)
+ $(OBJDUMP) --disassemble --source --line-numbers $<
+
+.PHONY: dump-elf-syms
+dump-elf-syms: $(BIN_ELF)
+ $(OBJDUMP) --syms $<
+
+.PHONY: clean
+clean:
+ @echo [RM] $(OBJ) $(BIN_ELF) $(BIN_BIN)
+ @rm -rf $(OBJ) $(BIN_ELF) $(BIN_BIN)
+
+.c.o:
+ @echo [GCC] $<
+ @$(GCC) $(GCC_FLAGS) -o $@ -c $<
+
+$(BIN_ELF): layout.lds $(OBJ)
+ @echo [GLD] -T layout.lds -o $@ $(OBJ)
+ @$(GLD) $(GLD_FLAGS) -T layout.lds -o $@ $(OBJ)
+
diff --git a/README.md b/README.md
@@ -0,0 +1,10 @@
+# armv7_helloworld
+Bare metal QEMU ARMv7 example
+
+## references
+ - `QEMU:vexpress.c` -- qemu-X.Y.Z/hw/arm/vexpress.c
+ - `DDI0183` -- ARM PL011 datasheet
+
+2018 David DiPaola
+licensed under CC0 (public domain, see https://creativecommons.org/publicdomain/zero/1.0/)
+
diff --git a/gdbinit b/gdbinit
@@ -0,0 +1,2 @@
+target extended-remote localhost:1234
+
diff --git a/layout.lds b/layout.lds
@@ -0,0 +1,39 @@
+/*
+2018 David DiPaola
+licensed under CC0 (public domain, see https://creativecommons.org/publicdomain/zero/1.0/)
+*/
+
+/* code entry point */
+ENTRY(main)
+
+/* memory regions (see QEMU:vexpress.c) */
+MEMORY {
+ MAP_IO_UART0 : ORIGIN = 0x1C090000, LENGTH = 0x00000400 /* 1KB */
+ MAP_DRAM : ORIGIN = 0x80000000, LENGTH = 0x80000000 /* 2GB */
+}
+
+/* ELF binary sections */
+SECTIONS {
+ /* NOTE `SUBALIGN` is used with the `gcc` flags `-ffunction-sections` and `-fdata-sections` to ensure each function and piece of data are properly aligned */
+
+ /* IO: UART0 */
+ SECTION_IO_UART0 ORIGIN(MAP_IO_UART0): SUBALIGN(4) {
+ *(.data)
+ *(.bss)
+ } >MAP_IO_UART0
+
+ /* DRAM */
+ .text ORIGIN(MAP_DRAM) + 0 : SUBALIGN(4) { /* code and read-only data */
+ *(.text.startup.main)
+ *(.text)
+ *(.rodata)
+ } >MAP_DRAM
+ .data ORIGIN(MAP_DRAM) + SIZEOF(.text) : SUBALIGN(4) { /* initialized data */
+ *(.data)
+ } >MAP_DRAM
+ .bss ORIGIN(MAP_DRAM) + SIZEOF(.text) + SIZEOF(.data) : SUBALIGN(4) { /* uninitialized data */
+ *(.bss)
+ } >MAP_DRAM
+
+}
+
diff --git a/main.c b/main.c
@@ -0,0 +1,40 @@
+/*
+2018 David DiPaola
+licensed under CC0 (public domain, see https://creativecommons.org/publicdomain/zero/1.0/)
+*/
+
+#define pragma_section(name) __attribute__((section(name)))
+
+typedef unsigned int u32;
+
+/* PL011 registers (see DDI0183:3.2) */
+struct uart_pl011 {
+ volatile u32 dr; /* 0x000 */
+};
+
+pragma_section("SECTION_IO_UART0") struct uart_pl011 uart0;
+
+static void
+print(const char * s) {
+ char c;
+ for (;;) {
+ c = *s;
+ if (c == '\0') break;
+ uart0.dr = c;
+ s++;
+ }
+}
+
+static void
+println(const char * s) {
+ print(s);
+ print("\r\n");
+}
+
+void
+main(void) {
+ for (;;) {
+ println("hi");
+ }
+}
+
